1. Field of the Invention
The present invention relates generally to an image processing system and method therefore, and more particularly to an image processing system and method where selected image data including overlap areas can be sent from memories to DSPs by entering the same image data into a plurality of memories, without requiring transfers of overlap areas between DSPs.
2. Description of Related Art
It is known that an image processing system 30 in FIG. 5 performs image processing of captured image data. The image data is captured using a line sensor 44. The line sensor 44 outputs the image data continuously. The image processing system 30 performs distributed and parallel processing of the image data using a plurality of digital signal processors (DSPs) 361, 362, 363, and 36m. Note that a reference character n in FIG. 5 indicates the number of DSPs 36, where n is a positive integer. Furthermore, the reference numeral 36 includes reference numerals 361 to 36m in FIG. 5 and the specification. A reference numeral 46 includes reference numerals 461 to 46m.
FIG. 6 shows the image data 38 input to the image processing system 30. In FIG. 6 and the specification, a reference numeral 40 includes reference numerals 401 to 40n+1. A reference numeral 42 includes reference numerals 421 to 42n+1. The image data 38 is input to a first-in first-out (FIFO) memory 32 in units of one line and distributed to DSPs 36 in units of a given number of lines. In the distribution method, the image data 38 is divided in units of data areas each having a given size and the divided image data 40 of the data areas are distributed to the DSPs 36. For example, the image data 401 is sent to a first DSP 361. Upon receiving the image data 40, each DSP 36 stores the image data 40 into a memory 46 connected to the DSP 36 and performs predetermined image processing for the image data 40.
The image processing system 30 needs to receive the image data 38 continuously without missing any data. Additionally, an overlap area 42 is needed for the plurality of DSPs 36 to divide and process the continuous image data 38. For example, an overlap area 421 is to be transferred from the image data 401 in the first DSP 361 to the second DSP 362.
The following describes a reason for transferring the overlap area 42 to the next DSP. Image data fetched once does not remain in the FIFO memory 32. In other words, when the image data 401 is assigned to the first DSP 361 from the FIFO memory 32 and then the image data 402 is to be assigned to the second DSP 362 from the FIFO memory 32, the overlap area 421 does not remain in the FIFO memory 32. Therefore, the overlap area 421 is transferred through an image transfer between the first and second DSPs 361 and 362. For example, as shown in FIG. 6, the overlap area 421 is assumed to be an area of line 980 to line 1000 in the image data 401 input to the first DSP 361. The overlap area 421 is transferred to the second DSP 362 before an execution of image processing in the first DSP 361.
The system, however, requires that the image data transfer between individual DSPs 36 be of a period of time in milliseconds and the DSP 36 is unable to start image processing until the transfer is complete. If the overlap area 42 is large, the transfer requires a lot of time, thereby making the above problem more serious.
As the overlap area 42 gets larger, time required for the transfer increases, resulting in an increase of the latency up to the instant at which the DSPs 36 start image processing. Therefore, the system 30 has less desirable performance in terms of image processing per unit time and therefore needs to have additional DSPs 36 for the latency. The need has thus long persisted for to overcome these unresolved problems and deficiencies by the invention described below.